| CQSZ |
INCLOSURE CONFIGURATION |
DUAL-IN-LINE |
| AFGA |
OPERATING TEMP RANGE |
-55.0/+125.0 DEG CELSIUS |
| CQWX |
OUTPUT LOGIC FORM |
DIODE-TRANSISTOR LOGIC |
| CBBL |
FEATURES PROVIDED |
HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND EXPANDABLE |
| CTFT |
CASE OUTLINE SOURCE AND DESIGNATOR |
-0-001-AG JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| ADAT |
BODY WIDTH |
0.245 INCHES MINIMUM AND 0.300 INCHES MAXIMUM |
| ADAU |
BODY HEIGHT |
0.120 INCHES MINIMUM AND 0.195 INCHES MAXIMUM |
| ADAQ |
BODY LENGTH |
0.750 INCHES MINIMUM AND 0.795 INCHES MAXIMUM |
| AFJQ |
STORAGE TEMP RANGE |
-65.0/+150.0 DEG CELSIUS |
| CQSJ |
INCLOSURE MATERIAL |
CERAMIC AND GLASS |
| CQZP |
INPUT CIRCUIT PATTERN |
QUAD 2 INPUT |
| TEST |
TEST DATA DOCUMENT |
96214-537051 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| CZEQ |
TIME RATING PER CHACTERISTIC |
300.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 200.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| CSSL |
DESIGN FUNCTION AND QUANTITY |
4 GATE, NAND |