| AFGA |
OPERATING TEMP RANGE |
-55.0/+125.0 DEG CELSIUS |
| PRMT |
PRECIOUS MATERIAL |
GOLD |
| ADAU |
BODY HEIGHT |
0.035 INCHES MINIMUM AND 0.050 INCHES MAXIMUM |
| CQZP |
INPUT CIRCUIT PATTERN |
9 INPUT |
| ADAQ |
BODY LENGTH |
0.250 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
| CQSJ |
INCLOSURE MATERIAL |
GLASS AND METAL |
| CQSZ |
INCLOSURE CONFIGURATION |
FLAT PACK |
| TTQY |
TERMINAL TYPE AND QUANTITY |
14 FLAT LEADS |
| TEST |
TEST DATA DOCUMENT |
98230-ON150365 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| AFJQ |
STORAGE TEMP RANGE |
-65.0/+150.0 DEG CELSIUS |
| CZEN |
VOLTAGE RATING AND TYPE PER CHARACTERISTIC |
5.5 VOLTS MAXIMUM POWER SOURCE |
| CSSL |
DESIGN FUNCTION AND QUANTITY |
1 FLIP-FLOP, CLOCKED AND 1 FLIP-FLOP, J-K, AND INPUT MASTER SLAVE |
| CQWX |
OUTPUT LOGIC FORM |
TRANSISTOR-TRANSISTOR LOGIC |
| PMLC |
PRECIOUS MATERIAL AND LOCATION |
TERMINALS GOLD AND BODY GOLD |
| ADAT |
BODY WIDTH |
0.140 INCHES MINIMUM AND 0.150 INCHES MAXIMUM |
| CZEQ |
TIME RATING PER CHACTERISTIC |
39.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 50.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| CBBL |
FEATURES PROVIDED |
HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND EDGE TRIGGERED AND MEDIUM POWER AND PRESETTABLE AND MEDIUM SPEED AND W/CLEAR |
| AEHX |
MAXIMUM POWER DISSIPATION RATING |
110.0 MILLIWATTS |
| CWSG |
TERMINAL SURFACE TREATMENT |
SOLDER |
| CTFT |
CASE OUTLINE SOURCE AND DESIGNATOR |
T0-84 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |