TEST |
TEST DATA DOCUMENT |
05464-40939 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
CZEN |
VOLTAGE RATING AND TYPE PER CHARACTERISTIC |
15.0 VOLTS MAXIMUM POWER SOURCE |
AFGA |
OPERATING TEMP RANGE |
+0.0/+70.0 DEG CELSIUS |
ADAT |
BODY WIDTH |
0.120 INCHES MINIMUM AND 0.150 INCHES MAXIMUM |
CQSJ |
INCLOSURE MATERIAL |
CERAMIC OR METAL |
CQSZ |
INCLOSURE CONFIGURATION |
FLAT PACK |
TTQY |
TERMINAL TYPE AND QUANTITY |
14 FLAT LEADS |
AFJQ |
STORAGE TEMP RANGE |
-65.0/+150.0 DEG CELSIUS |
ADAU |
BODY HEIGHT |
0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM |
ADAQ |
BODY LENGTH |
0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
CZEQ |
TIME RATING PER CHACTERISTIC |
50.00 NANOSECONDS NOMINAL PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 50.00 NANOSECONDS NOMINAL PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
CQZP |
INPUT CIRCUIT PATTERN |
6 INPUT |
CBBL |
FEATURES PROVIDED |
MONOLITHIC AND HERMETICALLY SEALED AND NEGATIVE OUTPUTS AND POSITIVE OUTPUTS AND MEDIUM SPEED |
CQWX |
OUTPUT LOGIC FORM |
CURRENT-MODE LOGIC |
CRHL |
BIT QUANTITY (NON-CORE) |
48 |
CWSG |
TERMINAL SURFACE TREATMENT |
SOLDER |
CTFT |
CASE OUTLINE SOURCE AND DESIGNATOR |
T0-84 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |