| PMLC |
PRECIOUS MATERIAL AND LOCATION |
TERMINAL SURFACE GOLD |
| AFGA |
OPERATING TEMP RANGE |
-55.0/+125.0 DEG CELSIUS |
| CQZP |
INPUT CIRCUIT PATTERN |
DUAL 5 INPUT |
| PRMT |
PRECIOUS MATERIAL |
GOLD |
| ADAT |
BODY WIDTH |
0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
| CTFT |
CASE OUTLINE SOURCE AND DESIGNATOR |
T0-88 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| CZEQ |
TIME RATING PER CHACTERISTIC |
50.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 40.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| AEHX |
MAXIMUM POWER DISSIPATION RATING |
45.2 MILLIWATTS |
| CQSZ |
INCLOSURE CONFIGURATION |
FLAT PACK |
| CBBL |
FEATURES PROVIDED |
MONOLITHIC AND HERMETICALLY SEALED AND POSITIVE OUTPUTS |
| AFJQ |
STORAGE TEMP RANGE |
-65.0/+150.0 DEG CELSIUS |
| ADAU |
BODY HEIGHT |
0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM |
| CSSL |
DESIGN FUNCTION AND QUANTITY |
2 GATE, NAND |
| TEST |
TEST DATA DOCUMENT |
09128-D34010894 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| CQSJ |
INCLOSURE MATERIAL |
CERAMIC AND GLASS |
| CQWX |
OUTPUT LOGIC FORM |
TRANSISTOR-TRANSISTOR LOGIC |
| ADAQ |
BODY LENGTH |
0.330 INCHES MINIMUM AND 0.350 INCHES MAXIMUM |